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Table 5 Compute throughput (Mbases/s) on separate datasets, and average throughput (Mbases/s) / power consumption (kbases/watt): comparison among ABEA on CPU-only implementation, GPU/CPU acceleration, and FPGA-based acceleration

From: FPGA-based accelerator for adaptive banded event alignment in nanopore sequencing data analysis

Platform

\(\varvec{D_{example}}\)

\(\varvec{D_2}\)

\(\varvec{D_3}\)

Avg Thrpt

Avg Pwr Cons

VU9P

21.9

20.8

13.4

16.9

771.54

CPU

2.03

1.79

1.54

1.68

24.07

CPU/GPU-3070

7.67

3.79

2.87

3.38

55.78

DE5-net (projected)

1.67

–

–

1.67

135.1

CPU/GPU-V100

9.26

10.43

8.19

9.33

46.53

  1. \(^{1}\) CPU: AMD EPYC with 12 CPU threads
  2. \(^{2}\) CPU/GPU-3070: AMD EPYC + NVIDIA GeForce RTX 3070 GPU with 8 G HBM
  3. \(^{3}\) DE5-net: Intel E5-1630V3 + Altera Stratix V FPGA with 4GB RAM. Performance is projected by assuming 4 FPGA devices are available to match the resource of a single VU9P FPGA. Power(28nm) is scaled to match the same technology node(16nm) as VU9P FPGA
  4. \(^{4}\) CPU/GPU-V100: Intel Xeon Silver4114 + Nvidia Tesla V100 GPU with 16GB HBM